Thermal Instability in Power Bipolar Transistors:Experimental Data and Electro-Thermal Simulation

Second breakdown in forward-biased power transistors limit the safe operating area. This kind of failures depend on the interaction between the thermal and the electrical fields inside the chip. Moreover the layout seems to play a fundamental role in distribution of current and temperature inside the device determining the onset of the conditions to establish the current crowding and subsequent hot spots. In this paper an electro-thermal model of the device is suggested based on a discrete multi-cell representation of the same. Experimental and simulation results are compared to validate the model. The fundamental ideas are to get a very simple model in the description of the temperature dependent electrical characteristics of elementary cell and to describe the electrical and thermal model starting from the chip layout with the same elementary cell connected each other in two different network for electrical and thermal path.