Anomalous NMOSFET Substrate Current Behavior at Accelerated Hot-Carrier Stress Conditions

Anomalous substrate current behavior at accelerated hot-carrier (HC) stress conditions is observed in LDD n-MOSFETs. HC stress is applied at maximum substrate current condition (VG¿VD/2) on devices of a 0.7 ¿m process with 15nm gate oxide thickness and effective gate lengths varying between 0.5 ¿m and 1.2 ¿m. Initially both drain and substrate current decrease during stress, due to hot-carrier induced degradation (HCID). After a certain stress time, a turn-around effect is observed in the magnitude of substrate current during stress and after stress has been removed. The phenomenon is observed at moderate to high accelerated stress conditions. It is explained by initial reduction of the lateral electric field due to an increased series resistance in the LDD n^¿ region by enhanced interface state scattering followed by an increase in the threshold voltage. The latter lowers the drain saturation voltage and increases the electric field along the current flow path. Device simulations confirm this and show a very localized increase of the electric field and increased carrier heating near the damaged region.