DocumentCode
513913
Title
Field isolation and active devices for 16 Mbit DRAMs
Author
Mühlhoff, H. -M ; Dietl, J ; Küpper, P. ; Lemme, R.
Author_Institution
Siemens AG, Semiconductor Division, Otto-Hahn-Ring 6, Mÿnchen, West Germany
fYear
1990
fDate
10-13 Sept. 1990
Firstpage
531
Lastpage
534
Abstract
Results are presented showing that conventional LOCOS Isolation can be used for memory cells with pitches less than 1.5¿m. Careful tuning of LOCOS overetch and channel stop implantation as well as optimization of the cell transistor yield satisfactory isolation of 0.7¿m LOCOS and half-micron active devices with active area widths of 0.25¿m.
Keywords
Doping profiles; Implants; MOS devices; Oxidation; Publishing; Random access memory; Substrates; Temperature; Thickness measurement; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1990. ESSDERC '90. 20th European
Conference_Location
Nottingham, England
Print_ISBN
0750300655
Type
conf
Filename
5436300
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