DocumentCode :
513922
Title :
Coupling of different leakage paths between trench capacitors
Author :
Bergner, W. ; Kircher, R.
Author_Institution :
ZFE SPT 33, SIEMENS AG, Otto-Hahn-Ring 6, D.8000 Munich 83, Germany, Tel. (+4989) 636-45782.
fYear :
1990
fDate :
10-13 Sept. 1990
Firstpage :
469
Lastpage :
472
Abstract :
Out from various cell concepts under investigation for the 16 and 64 Megabit DRAM generation the depletic type trench cell is still favoured because of its low process complexity. However, further shrinking of this cell concept, which is been widely used for the 4 Megabit DRAM, may result in leakage problems between neighbouring trench capacitors. The isolation of a modified version of this cell type, the SSP cell, has been investigated by numerical simulation as a function of well implantation dose and the trench to trench separation in the case of three closely spaced trench capacitors.
Keywords :
Boron; Breakdown voltage; Capacitors; Doping profiles; Geometry; Numerical analysis; Numerical simulation; Random access memory; Shape; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 1990. ESSDERC '90. 20th European
Conference_Location :
Nottingham, England
Print_ISBN :
0750300655
Type :
conf
Filename :
5436314
Link To Document :
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