DocumentCode

513985

Title

Vertical Scaling Considerations for Polysilicon-Emitter Bipolar Transistors

Author

Schaber, H. ; Bieger, J. ; Benna, B. ; Meister, T.

Author_Institution

Siemens AG, Central Research and Development, Microelectronics, Otto-Hahn-Ring 6, D-8000 Munchen 83, FRG

fYear

1987

fDate

14-17 Sept. 1987

Firstpage

365

Lastpage

368

Keywords

Annealing; Bipolar transistors; Boron; Crystallization; Current measurement; MONOS devices; Optical films; Pollution measurement; Silicon; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid State Device Research Conference, 1987. ESSDERC '87. 17th European

Conference_Location

Bologna, Italy

Print_ISBN

0444704779

Type

conf

Filename

5436598