DocumentCode
514027
Title
Combination of LOCOS and BOX Isolation for Submicron CMOS Technology
Author
Zeller, Ch. ; Stelz, F X
Author_Institution
Siemens AG, Otto-Hahn Ring 6, 8000 Munchen 83, West Germany
fYear
1989
fDate
11-14 Sept. 1989
Firstpage
135
Lastpage
138
Abstract
A new isolation method for submicron CMOS technology is presented, which combines the advantages of LOCOS and BOX isolation using one photolithographic step only. The technique is independent of circuit layout and the minimum isolation width is limited only by photolithographic resolution.
Keywords
Anisotropic magnetoresistance; Beak; Birds; CMOS technology; Circuits; Etching; Isolation technology; Oxidation; Silicon; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1989. ESSDERC '89. 19th European
Conference_Location
Berlin, Germany
Print_ISBN
0387510001
Type
conf
Filename
5436650
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