• DocumentCode
    514048
  • Title

    The Use of Boron Doped Polysilicon In PMOS Devices

  • Author

    Walker, A.J. ; Woerlee, P.H.

  • Author_Institution
    Philips Research Laboratories, 5600 JA Eindhoven, The Netherlands.
  • fYear
    1989
  • fDate
    11-14 Sept. 1989
  • Firstpage
    29
  • Lastpage
    32
  • Abstract
    Problems, such as short channel effecs, arise when the buried channel PMOS device is scaled down to submicron dimensions. These can be alleviated by using boron doped polysilicon as gate material which results in a surface channel device, The effects of p-type polysilicon on capacitor and transistor parameters are presented. It is shown that, despite capacitor gate oxide instabilities, the boron doped polysilicon transistors are more hot-carrier resistant.
  • Keywords
    Annealing; Boron; Capacitors; Doping; Dry etching; Electrodes; Implants; MOS devices; Nitrogen; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Device Research Conference, 1989. ESSDERC '89. 19th European
  • Conference_Location
    Berlin, Germany
  • Print_ISBN
    0387510001
  • Type

    conf

  • Filename
    5436676