Title :
A Comparison of Retrograde and Conventional N-Wells for Sub-Micron CMOS Circuits
Author :
Lewis, A.G. ; Martin, A. ; Chen, J.Y. ; Huang, T.Y. ; Koyanagi, M.
Author_Institution :
Xerox Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, CA 94304, USA
Abstract :
A general and direct comparison of retrograde and conventional n-well CMOS technologies is reported. The advantages of the retrograde structures in terms of packing density, isolation and short channel PMOS characteristics are demonstrated. The conventional wells offer slightly better circuit performance due to lower p + to n-well junction capacitance. However, the major difference between the well types lies in their latchup susceptibility: here the retrograde wells have a significant advantage due to their lower sheet resistance and greater tolerance to very thin p-on-p + epitaxial layers.
Keywords :
CMOS technology; Capacitance; Circuit optimization; Doping; Epitaxial layers; Fabrication; Ion implantation; Isolation technology; MOSFETs; Very large scale integration;
Conference_Titel :
Solid State Device Research Conference, 1987. ESSDERC '87. 17th European
Conference_Location :
Bologna, Italy