Title :
1.2μm Bi-CMOS Technology with High Performance ECL
Author :
Iwai, H. ; Niitsu, Y. ; Sasaki, G. ; Norishima, M. ; Shino, K. ; Unno, Y. ; Tsugaru, K. ; Hara, H. ; Sugimoto, Y. ; Kanzaki, K.
Author_Institution :
Semiconductor Device Eng. Lab., Toshiba Corp., 1, Komukai-Toshiba-cho, Saiwai-ku, Kawasaki, 210, Japan.
Abstract :
1.2μm Bi-CMOS technology with ECL gate for high speed device has been developed. A process is carefully optimized for obtaining the best performance of ECL gate without degrading 1.2μm Bi-CMOS performance and mass productivity.
Keywords :
BiCMOS integrated circuits; Bipolar transistors; Bismuth; CMOS logic circuits; CMOS process; CMOS technology; Logic devices; MOSFET circuits; Microcomputers; Very large scale integration;
Conference_Titel :
Solid State Device Research Conference, 1987. ESSDERC '87. 17th European
Conference_Location :
Bologna, Italy
