0.5 μm CMOS Devices and Circuit Characterization

CMOS circuits with feature sizes scaled down to 0.5μm [1],[2] and even less [3],[4] have already been reported. In this paper, we report the fabrication of half micron CMOS using mixed e-beam/optical lithography and Rapid Thermal Annealing (RTA) for both BPSG reflow and junction activation. The aim of this work is to characterize devices and to compare speed performances of demonstrator circuits such as ring oscillator and 16kxl SRAM fabricated using either 0.5μm CMOS advanced technology at a 3.3V supply voltage or a 0.8μm CMOS at 5V.