DocumentCode
514330
Title
FPGA implementation of digital up/down convertor for WCDMA system
Author
Mahboob, Saad
Author_Institution
Sch. of Eng. Sci., Simon Fraser Univ., Burnaby, BC, Canada
Volume
1
fYear
2010
fDate
7-10 Feb. 2010
Firstpage
757
Lastpage
760
Abstract
In this paper, we present FPGA implementation of a digital down convertor (DDC) and digital up convertor (DUC) for a single carrier WCDMA system. The DDC and DUC is complex in nature. The implementation of DDC is simple because it does not require mixers or filters. Xilinx System Generator and Xilinx ISE are used to develop the hardware circuit for the FPGA. Both the circuits are verified on the Virtex-4 FPGA.
Keywords
code division multiple access; convertors; field programmable gate arrays; FPGA implementation; Virtex-4 FPGA; Xilinx ISE; Xilinx system generator; digital down convertor; digital up convertor; hardware circuit; single carrier WCDMA system; Baseband; Circuits; Converters; Field programmable gate arrays; Finite impulse response filter; Frequency conversion; Mobile communication; Multiaccess communication; Passband; Radio frequency; DDS; FIR; FPGA; WCDMA;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Communication Technology (ICACT), 2010 The 12th International Conference on
Conference_Location
Phoenix Park
ISSN
1738-9445
Print_ISBN
978-1-4244-5427-3
Type
conf
Filename
5440188
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