Title :
Two Analog Counters for Neural Networks Implementation
Author :
Madani, K. ; Garda, P. ; Devos, F.
Author_Institution :
I.E.F., Univ. de Paris Sud, Orsay, France
Abstract :
Analog counters are an attractive building block for Artificial Neural Networks circuits, either for weight representation or for statistical learning algorithms. We give two schemes for such counters, which feature different design trade offs. Model, simulation and test results are presented.
Keywords :
counting circuits; learning (artificial intelligence); neural nets; statistical analysis; analog counter; artificial neural networks circuit; statistical learning algorithm; Artificial neural networks; Capacitors; Clocks; Counting circuits; Machine learning; Neural networks; Neurons; Packet switching; Switches; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 1990. ESSCIRC '90. Sixteenth European
Conference_Location :
Grenoble
Print_ISBN :
2-86332-087-4
