• DocumentCode
    516192
  • Title

    Bridging Faults in CMOS: Possibilities of Current Testing

  • Author

    Rodríguez, R. ; Segura, J.A. ; Champac, V.H. ; Figueras, J. ; Rubio, J.A.

  • Author_Institution
    Dept. d´´Eng. Electron., Univ. Politec. de Catalunya, Barcelona, Spain
  • Volume
    1
  • fYear
    1990
  • fDate
    19-21 Sept. 1990
  • Firstpage
    117
  • Lastpage
    120
  • Abstract
    Bridging faults have been shown to be a major failure mode in CMOS IC´s [SHE85]. A model that takes into account the different resistance values of the bridge is presented. This model is used to estimate the IDDQ range of values to evaluate the possibility of current testing of this fault [NIG90]. A simple circuit is used as an example. This methodology is demonstrated to provide a greater domain of detectability of bridging faults than the classical approaches.
  • Keywords
    CMOS integrated circuits; failure analysis; integrated circuit modelling; integrated circuit reliability; integrated circuit testing; CMOS IC failure mode; CMOS bridging fault; current testing; Bridge circuits; Circuit faults; Electrical fault detection; Fault detection; Integrated circuit modeling; Inverters; Semiconductor device modeling; Temperature dependence; Testing; Voltage; Bridging fault; IDDQ testing; current testing; fault modelling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1990. ESSCIRC '90. Sixteenth European
  • Conference_Location
    Grenoble
  • Print_ISBN
    2-86332-087-4
  • Type

    conf

  • Filename
    5467773
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=516192