DocumentCode
516249
Title
Systolic Array Architecture for Early Vision Processing
Author
Legat, J.-D. ; Cornil, J.P. ; Macq, D. ; Verleysen, M.
Author_Institution
Laboratoire de Micro?lectronique, Universit? Catholique de Louvain, Place du Levant 3, B-1348 Louvain-la-Neuve, Belgium
Volume
1
fYear
1991
fDate
11-13 Sept. 1991
Firstpage
93
Lastpage
96
Abstract
This paper describes the architecture and the implementation of a systolic processor dedicated to motion estimation which is one of the most important task in early vision processing. The input image is scanned by a standard video camera with 256 grey levels. Motion computing is based on the optical flow determination. An algorithm to detect multi-motion is proposed and is implemented in real-time in a systolic array.
Keywords
Brightness; Cameras; Computer architecture; Differential equations; Image motion analysis; Image segmentation; Image sequences; Motion estimation; Optical computing; Systolic arrays;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1991. ESSCIRC '91. Proceedings - Seventeenth European
Conference_Location
Milan, Italy
Type
conf
Filename
5467842
Link To Document