DocumentCode :
516343
Title :
Nodal Chip for Parallel Neural Signal Processing
Author :
Kesper, M. ; Hosticka, B.J. ; Richert, P. ; Scholles, M. ; Schwarz, M.
Author_Institution :
Fraunhofer Institute of Microelectronic Circuits and Systems, Duisburg, Germany
Volume :
1
fYear :
1993
fDate :
22-24 Sept. 1993
Firstpage :
82
Lastpage :
85
Abstract :
This work describes a neural network chip which allows combining massive parallel interneural communication with sophisticated intraneural computation and can be used for construction of neural network systems. The chip enables the emulation of different types of neurons including biologically inspired models based on activity pulses, learnable synaptic weights and delays, variable neuron gain, calculation of membrane potential, and static and dynamic thresholding. The chip makes it possible to build neural grid arrays where each node contains one chip and possesses global communication capability despite locally interconnected chips.
Keywords :
Biological system modeling; Biology computing; Biomedical signal processing; Computer networks; Concurrent computing; Delay; Emulation; Neural networks; Neurons; Signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1993. ESSCIRC '93. Nineteenth European
Conference_Location :
Sevilla, Spain
Print_ISBN :
2-86335-134-X
Type :
conf
Filename :
5467949
Link To Document :
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