Title :
Power Dissipation Analysis of CMOS VLSI Circuits by means of Switch-Level Simulation
Author_Institution :
Philips Res. Labs. Eindhoven, Nederlandse Philips Bedrijven B.V., Eindhoven, Netherlands
Abstract :
A method has been defined to analyze the power dissipation of CMOS VLSI circuits by means of switch-level simulation. Random vectors are used as stimuli to the circuit to ensure vector-independentness. The method has been implemented using an existing mixed-level simulator. Results are described for a range of circuits, including a 20,000 transistor one.
Keywords :
CMOS integrated circuits; VLSI; CMOS VLSI circuits; mixed-level simulator; power dissipation analysis; switch-level simulation; Analytical models; Capacitance; Circuit simulation; Computational modeling; Laboratories; Power dissipation; Probability; Random number generation; Switching circuits; Very large scale integration;
Conference_Titel :
Solid-State Circuits Conference, 1990. ESSCIRC '90. Sixteenth European
Conference_Location :
Grenoble
Print_ISBN :
2-86332-087-4
