DocumentCode
516383
Title
ALMA A design methodology for Microsystem Architectures
Author
Brunei, J.Y. ; Callemyn, J.M. ; Tychon, P. ; Augé, I. ; Israël, M.
Author_Institution
LEP, Limeil Brevannes, France
Volume
1
fYear
1990
fDate
19-21 Sept. 1990
Firstpage
65
Lastpage
68
Abstract
ALMA is a structured ASIC design methodology for silicon compilation to be used as a front end to existing CAD environments which provide the lower level silicon compilation tools (data path compiler, logic synthesizer, place & route...). This methodology relies on the use of cell libraries available from vendors and a new HDL: "A". This language describes the structure of the circuit and its behavior by giving the sequence of operations to be performed without any timing reference. Automatic sequencement is then done according to the exact timing caracteristics of the used library cells. ALMA provides interfaces to the host CAD and generates a "C" program, which has the same functionality than the "A" source given by the designer, and which includes the timing references. Simple description and fast compilation, together with the rapid evaluation due to the "C" program, permits to explore alternative solutions (the structure/algorithm couple) so as to elect the one that best matches the designer\´s priorities in term of functionality, performance and cost.
Keywords
application specific integrated circuits; elemental semiconductors; integrated circuit design; silicon; ALMA design methodology; C program; HDL; Si; automatic sequencement; library cells; low level silicon compilation tools; microsystem architectures; structured ASIC design methodology; Algorithm design and analysis; Application specific integrated circuits; Design automation; Design methodology; Hardware design languages; Libraries; Logic design; Silicon; Synthesizers; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1990. ESSCIRC '90. Sixteenth European
Conference_Location
Grenoble
Print_ISBN
2-86332-087-4
Type
conf
Filename
5467995
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