DocumentCode :
516405
Title :
An Inherently Monotonic 7 Bit CMOS ADC for Video Applications
Author :
Joy, A.K. ; Killips, R.J. ; Saul, P.H.
Author_Institution :
Plessey Research (Caswell) Limited, Towcester, Northants, England
fYear :
1985
fDate :
16-18 Sept. 1985
Firstpage :
97
Lastpage :
107
Abstract :
This paper describes a CMOS 7 bit flash analogue to digital converter capable of operation at sample rates in excess of 22 MSPS with an analogue bandwidth to ±¿ 1sb of 5MHz. The device has been realised on a 2.5¿m double layer metal CMOS process. Monotonicity is guaranteed by the decoding scheme and the accuracy is defined by the inherent matching of the device threshold voltages in the comparator input stages.
Keywords :
Analog-digital conversion; Bandwidth; CMOS logic circuits; CMOS process; Clocks; Costs; Decoding; Hysteresis; Latches; Master-slave;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1985. ESSCIRC '85. 11th European
Conference_Location :
Toulouse, France
Type :
conf
Filename :
5468021
Link To Document :
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