DocumentCode :
516422
Title :
A 12ns/350mW 16Kb ECL Compatible RAM
Author :
Odaka, Masanori ; Miyaoka, Shuuichi ; Ogiue, Katsumi ; Tonomura, Kenichi ; Ikeda, Takahide ; Yasui, Tokumasa
Author_Institution :
Device Development Center, Hitachi, Ltd., 1450, Josuihon-cho, Kodaira-shi, Tokyo, 187, Japan. Tel (0423) 25-1111, Tlx 2832-5555 Hitsem. J Hitachi, Ltd.
fYear :
1985
fDate :
16-18 Sept. 1985
Firstpage :
166
Lastpage :
176
Abstract :
A 12ns/350mw 16Kb ECL compatible RAM with bipolar ECL inpur/output buffers has been developed by using 2¿m polyside gate CMOS technology which has bipolar transistors with 3GHz cut-off frequency on the same chip.
Keywords :
Bipolar transistors; CMOS logic circuits; CMOS memory circuits; CMOS process; CMOS technology; Cutoff frequency; Delay effects; MOSFETs; Power dissipation; Read-write memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1985. ESSCIRC '85. 11th European
Conference_Location :
Toulouse, France
Type :
conf
Filename :
5468055
Link To Document :
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