Title :
A 60ns 1Mb Pseudo Static RAM with High Speed Modes
Author :
Shinoda, T. ; Kajimoto, T. ; Ito, K. ; Kenmizaki, K. ; Ishihara, M. ; Yasu, Y. ; Tanimura, N.
Author_Institution :
Device Development Center, Hitachi Ltd. 2326, Imai Ome-shi, Tokyo, 198 Japan
Abstract :
A 1Mb Pseudo Static RAM has been fabricated using 1.3¿m n-well CMOS technology. For ease of use, three kinds of high speed modes: static column, page, and serial mode are realized on the same chip controlled by timing relations. Improvement of the Vbb generator circuits and refresh timer allows for battery back up operation. A typical CE access time of 60ns is achieved. Operating and standby current are 35mA at 190ns cycle time and 10¿A, respectively. Operating current in self refresh mode is less than 100¿A.
Keywords :
Aluminum; CMOS technology; Circuits; Decoding; Indium tin oxide; Random access memory; Read-write memory; Redundancy; Timing; Very large scale integration;
Conference_Titel :
Solid-State Circuits Conference, 1986. ESSCIRC '86. Twelfth European
Conference_Location :
Delft, The Netherlands
