DocumentCode
516556
Title
Analogue Design Techniques for a Subscriber Loop Transceiver
Author
Colbeck, Roger ; Gillingham, Peter
Author_Institution
Mitel Corporation, 350 Legget Drive, Kanata, Ontario, K2K 1Ã\x973, CANADA
fYear
1986
fDate
16-18 Sept. 1986
Firstpage
128
Lastpage
130
Abstract
The design techniques used to implement the analogue portions of a single-chip digital subscriber loop transceiver are described. The device provides a full-duplex communication link at l60Kb/s or 80Kb/s over 4Km or 5Km, respectively, of 0.5¿m twisted-pair cable. The 22-pin 27.7mmsq 3um double poly CMOS IC consumes 50mW from single 5 volt supply.
Keywords
Capacitors; Circuits; Clocks; Digital filters; Echo cancellers; Finite impulse response filter; Shift registers; Subscriber loops; Transceivers; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1986. ESSCIRC '86. Twelfth European
Conference_Location
Delft, The Netherlands
Type
conf
Filename
5468345
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