DocumentCode
516562
Title
Design of a Compiler for the Generation of Self-Testable Macros
Author
van Riessen, R.P. ; Kerkhoff, H.G. ; Kloppenburg, A.
Author_Institution
IC-technology and Electronics Group, University of Twente, P.O. box 217, 7500 AE Enschede, The Netherlands
fYear
1988
fDate
21-23 Sept. 1988
Firstpage
194
Lastpage
197
Abstract
This paper describes the design and implementation of a macro-dependent self-test compiler. The compiler requires information from the designer about the type and size of the macro that has to be generated. Dependent on the desired faultcoverage, the compiler automatically generates the layout of the macro, including the appropriate data-generation and evaluation self-test hardware. A scan path, based on the boundary-scan principle, is used to initialize the self-test hardware.
Keywords
Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Hardware; Integrated circuit testing; Libraries; Performance evaluation; Software tools; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1988. ESSCIRC '88. Fourteenth European
Conference_Location
Manchester, UK
Type
conf
Filename
5468351
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