• DocumentCode
    516632
  • Title

    A Practical Approach to Top/Down Analog Circuit Design

  • Author

    Morin, J.-P. ; Lemery, F. ; Nercessian, E. ; Sharma, V. ; Benkoski, J. ; Samani, D.

  • Author_Institution
    SGS-Thomson Microelectronics BP 217 Grenoble 38019
  • Volume
    1
  • fYear
    1993
  • fDate
    22-24 Sept. 1993
  • Firstpage
    49
  • Lastpage
    52
  • Abstract
    Since the advent of the behavioral modeling languages in the analog domain, a practical paradigm for Top/Down analog design bringing the benefits already found in the digital domain has been sought. The difficulty to harness the power of the behavioral modeling languages has however been a limiting factor to their widespread usage in the design flow. The approach presented in this paper combines a graphical access to the most commonly used behavioral funcitons and a framework-based integration supporting the Top/Down design paradigm in the analog domain with a clear design methodolgy. These three components are key to a practical Top/Down design, encompassing the system level study, the architectural and structural decisions, and the implementation and verification of the circuit using analog multi-level and mixed-signal simulations. The benefits of this approach are demonstrated in the Top/Down design of a phase-locked loop presented in this paper.
  • Keywords
    Analog circuits; Buildings; Circuit simulation; Circuit synthesis; Design methodology; Libraries; Microelectronics; Operational amplifiers; Phase locked loops; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1993. ESSCIRC '93. Nineteenth European
  • Conference_Location
    Sevilla, Spain
  • Print_ISBN
    2-86335-134-X
  • Type

    conf

  • Filename
    5468450