DocumentCode
516634
Title
Instruction Set Design for a Nibble-Serial Signal Processing Element
Author
Cottrell, Robert A.
Author_Institution
Department of Electrical Engineering and Electronics, UMIST, PO Box 88, Manchester, UK
fYear
1988
fDate
21-23 Sept. 1988
Firstpage
50
Lastpage
53
Abstract
Programmable nibble-serial processors are an efficient means of implementation for signal processing algorithms involving the solution of difference equations. The architecture is based on a simple processing element, known as a Signal Processing Element (SPE), of which many could be fabricated on a single VLSI chip. This paper discusses the design of an instruction set for such an SPE, considering in particular the effects of data memory size, and the use of special purpose registers.
Keywords
Algorithm design and analysis; Arithmetic; Difference equations; Pipelines; Random access memory; Signal design; Signal processing; Signal processing algorithms; Silicon; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1988. ESSCIRC '88. Fourteenth European
Conference_Location
Manchester, UK
Type
conf
Filename
5468454
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