Title :
Latched-Flip-Flops - a new scantest-methodology
Author :
Scheuermann, K. ; Ebert, H.
Author_Institution :
Philips Kommunikations Industrie AG, Thurn-und-Taxis Str. 10, D-90327 Nÿrnberg
Abstract :
This paper describes a new scantest-approach which defines a design-independent standardized test-protocol. It guarantees a short time for test-preparation and testerrun. The described latched-flip-flop solves almost all problems in testing multiple clock-designs with an acceptable gate-overhead. By using latched-flip-flops it is possible to implement BIST and INTEST without taking different clocksystems into consideration.
Keywords :
Added delay; Automatic test pattern generation; Built-in self-test; Clocks; Control systems; Master-slave; Modems; Switches; System testing;
Conference_Titel :
Solid-State Circuits Conference, 1994. ESSCIRC '94. Twentieth European
Conference_Location :
Ulm, Germany
Print_ISBN :
2-86332-160-9