• DocumentCode
    516663
  • Title

    Defect Oriented Analog Testing: Strengths and Weaknesses

  • Author

    Sachdev, Manoj

  • Author_Institution
    Philips Research Laboratories, Prof. Holstlaan 4, 5656 AA Eindhoven, The Netherlands. Tel. 31-40-744708, Fax 31-40-744617, E-mail sachdev@prl.philips.nl
  • fYear
    1994
  • fDate
    20-22 Sept. 1994
  • Firstpage
    224
  • Lastpage
    227
  • Abstract
    In this article, we investigate the potential of process defect oriented test methods over analog circuits. Large number of simulations and tested silicon devices bring out the potential of simple, defect based, non-specification oriented test methods for analog testing. The carried out study also demonstrates that a small number of parametric failures are not caught by the method. Therefore, the method is supplemented by very limited specification testing to catch such failures. As a result, the overall test quality is improved while the test cost is reduce.
  • Keywords
    Analog circuits; Circuit faults; Circuit simulation; Circuit testing; Costs; Dictionaries; Digital circuits; Electrical fault detection; Laboratories; Silicon devices;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1994. ESSCIRC '94. Twentieth European
  • Conference_Location
    Ulm, Germany
  • Print_ISBN
    2-86332-160-9
  • Type

    conf

  • Filename
    5468494