Title :
Time-Interleaved Sampled-and-Hold S2I Circuit for High-Speed Current-Mode ADCs
Author :
Oliveira, J.P. ; Pereira, A.M. ; Franca, J.E.
Author_Institution :
Instituto Superior Técnico Integtated Circuits & Syst. Group 1096 Lisboa Codex, Portugal
Abstract :
This paper describes a current-mode sample-and-hold circuit which comprises two time-interleaved S2I cells and is capable of operating under loading conditions appropriate for high-speed current-mode analogue-to-digital converters. A prototype integrated circuit fabricated in a 1.2 ¿m digital CMOS technology exhibits better than 8-bits linearity at 25 MHz sampling frequency. At 5 V supply it dissipates less than 1.5 mW.
Keywords :
CMOS digital integrated circuits; CMOS integrated circuits; CMOS technology; Circuit testing; Frequency; Linearity; Prototypes; Sampling methods; Switching circuits; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 1994. ESSCIRC '94. Twentieth European
Conference_Location :
Ulm, Germany
Print_ISBN :
2-86332-160-9
