Title :
An ECL to CMOS Level Converter with Complementary Bipolar Output Stage
Author :
Rau, M. ; Pfleiderer, H.-J.
Author_Institution :
Abteilung fÿr Allgemeine Elektrotechnik und Mikroelektronik, Universitÿt Ulm, D-89069 Ulm
Abstract :
A novel circuit scheme for the fast amplification of digital signals is presented. A fully complementary bipolar output stage realizes steep output signal slopes and results in an improved driving capability for large capacitive loads. Samples produced in a 2¿m-BiCMOS technology show, that the total delay and the power dissipation is significantly reduced compared to the fastest known scheme.
Keywords :
BiCMOS integrated circuits; Bipolar transistors; CMOS logic circuits; CMOS technology; Delay; Inverters; Power dissipation; Signal design; Time factors; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 1994. ESSCIRC '94. Twentieth European
Conference_Location :
Ulm, Germany
Print_ISBN :
2-86332-160-9
