DocumentCode
516763
Title
A Double Quadrature Topology for High Accuracy Upconversion in CMOS Transmitters
Author
Crols, Jan ; Kinget, Peter ; Steyaert, Michiel
Author_Institution
Katholieke Universiteit Leuven, ESAT-MICAS, Kardinaal Mercierlaan 94, B-3001 Heverlee, Belgium
fYear
1996
fDate
17-19 Sept. 1996
Firstpage
200
Lastpage
203
Abstract
In this paper a high performance double quadrature topology for SSB upconversion is presented. The use of the double quadrature architecture allows to achieve a sideband suppression of more than 30 dB over a 225 MHz band from 700 to 925 MHz. This corresponds to a phase and amplitude accuracy of better than 1° and 10mdB. A first order input quadrature generator in combination with a 2nd order polyphase output filter result in an effective 3rd order suppression of the unwanted quadrature errors without sensitivity to component mismatch so that no tuning or trimming is required.
Keywords
Bandwidth; Baseband; CMOS technology; Filters; Frequency; Local oscillators; Topology; Transceivers; Transmitters; Tuning;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1996. ESSCIRC '96. Proceedings of the 22nd European
Conference_Location
Neuchatel, Switzerland
Print_ISBN
2-86332-197-8
Type
conf
Filename
5468626
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