DocumentCode
516805
Title
4 Gbit/s Driver/Multiplexer in 0.8 μm CMOS
Author
Edman, Anders
Author_Institution
Electronic Devices, Dept. of Physics, Linköping University, S-581 83 Linköping, Sweden. ase@ifm.liu.se
fYear
1996
fDate
17-19 Sept. 1996
Firstpage
372
Lastpage
375
Abstract
A low-swing high-speed differential CMOS output-driver/multiplexer is presented. A testchip, designed in a standard 0.8 μm CMOS process, has performed 4 Gbit/s multiplexing of a 16-bit fixed-pattern. Design and measurements of this testchip are presented
Keywords
CMOS process; CMOS technology; Circuit testing; Clocks; Driver circuits; High speed optical techniques; Multiplexing; Noise cancellation; Noise reduction; Physics;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1996. ESSCIRC '96. Proceedings of the 22nd European
Conference_Location
Neuchatel, Switzerland
Print_ISBN
2-86332-197-8
Type
conf
Filename
5468669
Link To Document