DocumentCode :
516847
Title :
A New Method for Improved Delay Characterization of VLSI Logic
Author :
Wagner, O. ; McLeod, M.H.
Author_Institution :
A. Vogel IBM Labs., Boeblingen, Germany
fYear :
1982
fDate :
22-24 Sept. 1982
Firstpage :
102
Lastpage :
105
Abstract :
A new method is described which allows determination of Ton and Toff delays of logic gates on VLSI chips as function of load by frequency measurements, that means with automatic testsystems and computer aided evaluation.
Keywords :
VLSI; automatic test equipment; delay circuits; frequency measurement; logic gates; logic testing; VLSI logic; automatic test systems; computer aided evaluation; frequency measurement; improved delay characterization; logic gates; Automatic testing; Capacitance; Circuit testing; Delay; Equations; Frequency measurement; Logic circuits; Logic testing; Resistors; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1982. ESSCIRC '82. Eighth European
Conference_Location :
Brussels
Type :
conf
Filename :
5468850
Link To Document :
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