DocumentCode :
516850
Title :
A GaAs Low Power Normally-on 4-bit Ripple Carry Adder
Author :
Perea, E.H. ; Damay-Kavala, F. ; Nuzillat, G. ; Arnodo, C.
Author_Institution :
THOMSON-CSF Central Res. Lab., Orsay, France
fYear :
1982
fDate :
22-24 Sept. 1982
Firstpage :
126
Lastpage :
129
Abstract :
A GaAs low power Buffered FET Logic (BFL) 4-bit ripple carry adder is presented. Preliminary performance measurements indicate a critical path average propagation delay of 1.9 ns at a total power dissipation of 45 mW, output buffers included. This corresponds to an average propagation delay of 380 ps/gate (FI/ FO = 5/3), an average power consumption of 1.5 mW/gate, and a power-delay product of 0.6 pJ. Unwired circuit density is 300 gates/mm2 while the effective density is 200 gates/mm2.
Keywords :
adders; buffer storage; carry logic; field effect logic circuits; low-power electronics; BFL; GaAs; critical path average propagation; low power buffered FET logic; power 45 mW; ripple carry adder; Adders; Arithmetic; Circuits; Energy consumption; FETs; Gallium arsenide; Laboratories; Logic gates; Measurement; Propagation delay;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1982. ESSCIRC '82. Eighth European
Conference_Location :
Brussels
Type :
conf
Filename :
5468853
Link To Document :
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