Title :
A Very High Speed CMOS/SOS Look-Up ROM
Author_Institution :
Newport Beach Res. Center, Hughes Aircraft Co., Newport Beach, CA, USA
Abstract :
A novel 18 kbit CMOS/SOS ROM combines very short cycle time (4 nsec) high density (7.2 kmil2) and radiation hardness [>;105 rad(Si)]. The design utilizes overlap timing, complementary ROM cells, delay optimization and 1.2...2pm geometry.
Keywords :
CMOS memory circuits; circuit optimisation; radiation hardening (electronics); read-only storage; table lookup; complementary ROM cells; delay optimization; look-up ROM; radiation hardness; storage capacity 18 Kbit; very high speed CMOS/SOS ROM; very short cycle time; Aircraft; Delay effects; Design optimization; Frequency; Geometry; Logic circuits; Matrix converters; Read only memory; Timing; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 1982. ESSCIRC '82. Eighth European
Conference_Location :
Brussels
