516887

A Three-Dimensional-CMOS Design Methodology

Hoefflinger, B. ; Liu, S.T. ; Vajdic, B.

University of Minnesota, Department of Electrical Engineering, Microelectronics and Information Sciences Center, Minneapolis, MN 55455

1983

21-23 Sept. 1983

175

178

CMOS logic circuits; CMOS technology; Circuit testing; Design methodology; Insulation; Integrated circuit interconnections; Inverters; MOS devices; Microelectronics; Silicon on insulator technology;

English

ieee

Solid-State Circuits Conference, 1983. ESSCIRC '83. Ninth European

Lausanne, Switzerland

2-88074-021-5

conf

5468895