Title :
30 ns 2KÃ\x979 (10) MTL RAM´s with TTL and ECL Interface
Author :
Wiedmann, S.K. ; Heuber, K. ; Wernicke, F. ; Klein, W. ; Brosch, R. ; Klink, E.
Author_Institution :
IBM Laboratories, 7030 Boeblingen/Germany
Abstract :
This paper describes a set of three static MTL RAM products of up to 18K bits with various organisations and interfaces. Manufactured in a standard bipolar process with 2.5 ¿m design rules, the chip sizes are within 25 mm2 and the typical access times are 30 ns.
Keywords :
Ceramics; Circuits; Equations; Latches; Logic; Manufacturing processes; Random access memory; Read-write memory; Switches; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 1983. ESSCIRC '83. Ninth European
Conference_Location :
Lausanne, Switzerland
Print_ISBN :
2-88074-021-5
