Title :
A 1 Gbit/s ´Westcott´ Data Test Set
Author :
Mallett, C.T. ; Cochrane, P
Author_Institution :
Post Office Research Centre
Keywords :
Circuits; Clocks; Error probability; Feedback loop; Polynomials; Random sequences; Shift registers; Synchronization; System testing; Transmitters;
Conference_Titel :
Solid State Circuits Conference - ESSCIRC 79, Fifth European
Conference_Location :
Southampton, UK
Print_ISBN :
0-85296-208-8
