DocumentCode :
516970
Title :
A CMOS Integrated N-Path Filter
Author :
Neyroud, O. ; Fellrath, J.
Author_Institution :
Centre Electron. Horloger, Neuchatel, Switzerland
fYear :
1978
fDate :
18-21 Sept. 1978
Firstpage :
197
Lastpage :
198
Abstract :
N-path configuration filters are an interesting realization of bandpass filters. Their center frequency depends only on the clock and not on the value of integrated elements. Clock noise is the main limiting factor. A careful layout of the circuits described above minimizes this effect. A 4-path filter, integrated in silicon-gate technology, illustrates the performance of such circuits. It was designed for a commutation frequency of 10 KHz and a Q-factor of 50. At a supply voltage of 1,5 V, the total power consumption is lower than lμA. The maximum input voltage is limited to 150 mV and clock noise can be reduced below 1 mV. Circuit area is about 1,2 mm2 .
Keywords :
CMOS integrated circuits; Q-factor; band-pass filters; clocks; CMOS integrated N-path filter; Q-factor; bandpass filters; clock noise; frequency 10 kHz; integrated elements; power consumption; silicon-gate technology; voltage 150 mV; Band pass filters; Bandwidth; Circuits; Clocks; Frequency; Passband; Q factor; Resistors; Switches; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Circuits Conference - Digest of Technical Papers, 1978. ESSCIRC 78. 4th European
Conference_Location :
Amsterdam
Type :
conf
Filename :
5469003
Link To Document :
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