Title :
The Multidrain MOS Transistor
Author :
Majos, J. ; Lardy, J.L.
Author_Institution :
Centre Nat. d´´Etudes des Telecommun., Lannion, France
Abstract :
The multidrain MOS transistor (MD-MOS) improves speed and packing density of the monolithic integrated circuits in the standard N-MOS silicon gate enhancement-depletion technology. In addition, with its modular structure, the MD-MOS gate allows a fast design-to-implementation turraround using symbolic modeIs.
Keywords :
MOS integrated circuits; MOSFET; integrated circuit design; monolithic integrated circuits; MD-MOS; N-MOS silicon gate enhancement-depletion technology; modular structure; monolithic integrated circuit; multidrain MOS transistor; packing density; speed; Capacitance; Clocks; Driver circuits; Flip-flops; Frequency; Joining processes; Libraries; Logic gates; MOSFETs; Silicon;
Conference_Titel :
Solid State Circuits Conference - Digest of Technical Papers, 1978. ESSCIRC 78. 4th European
Conference_Location :
Amsterdam
