Short Channel Hi-CMOS Device and Circuits

Author

Masuhara, T. ; Minato, O. ; Sakai, Y. ; Kubo, M. ; Yasui, T.

fYear

1978

fDate

18-21 Sept. 1978

Firstpage

131

Lastpage

132

Abstract

Short channel NMOS devices have been accepted for logic and memory circuits. However, the power dissipation tends to limit the performance. Use of CMOS circuit reduces power significantly with sacrifice of switching speed. To eliminate these disadvantages, a new short channel high speed CMOS (Hi-CMOS) device and circuit technology has been developed. It has, so far, been applied to 43-ns, 80-mW 4K static RAM and proved successful.

Keywords

CMOS digital integrated circuits; MOSFET; random-access storage; channel n-channel transistor; channel p-channel transistor; logic circuit; memory circuit; power 80 mW; power dissipation; short channel NMOS device; short channel high speed CMOS circuit; short channel high speed CMOS device; static RAM; time 43 ns; Bipolar transistors; CMOS logic circuits; Capacitance; Delay; Hot carrier injection; Logic circuits; Logic devices; MOS devices; Switching circuits; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid State Circuits Conference - Digest of Technical Papers, 1978. ESSCIRC 78. 4th European

Conference_Location

Amsterdam

Type

conf

Filename

5469023

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=516990