DocumentCode
517000
Title
A 5 V Dynamic 16 K RAM with a New Memory Cell Needs Only 8 mm2
Author
Horninger, Karlheinrich ; Meusburger, Günther ; Keller, Hermann
Author_Institution
Res. Labs., Siemens AG, Munich, Germany
fYear
1978
fDate
18-21 Sept. 1978
Firstpage
99
Lastpage
102
Abstract
A small 16 K RAM in double silicon technology using a novel dynamic memory cell has been realized and tested, using 3.5 μm design rules the complete memory is 8 mm2 large. First samples achieved an access time of 160 ns with a power dissipation of 85 mW.
Keywords
DRAM chips; elemental semiconductors; silicon; double silicon technology; dynamic RAM; memory cell; power 85 mW; size 3.5 mum; time 160 ns; voltage 5 V; Capacitance; Capacitors; Circuits; Fabrication; Power dissipation; Random access memory; Read-write memory; Signal design; Silicon; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Circuits Conference - Digest of Technical Papers, 1978. ESSCIRC 78. 4th European
Conference_Location
Amsterdam
Type
conf
Filename
5469033
Link To Document