DocumentCode
517013
Title
Speed Limit of Thin-Epitaxy MTL/I2L
Author
Berger, Horst H. ; Helwig, Klaus
Author_Institution
IBM Labs., Boblingen, Germany
fYear
1978
fDate
18-21 Sept. 1978
Firstpage
55
Lastpage
56
Abstract
The various speed limiting influences in conventional MTL devices are investigated. Even with thin epitaxy, charge storage in the npn part remains the main speed detractor. Hence, the npn part should be improved firstly, e.g. using polysilicon techniques.
Keywords
integrated injection logic; MTL devices; charge storage; polysilicon techniques; speed detractor; thin-epitaxy NTL/I2L speed limit; Capacitance; Computer simulation; Delay; Electronic switching systems; Epitaxial growth; Impurities; Photonic band gap; Process control; Silicon; Strips;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Circuits Conference - Digest of Technical Papers, 1978. ESSCIRC 78. 4th European
Conference_Location
Amsterdam
Type
conf
Filename
5469046
Link To Document