Title :
Low-Power D-MOS Logic
Author :
Declercq, M. ; Laurent, Th
Author_Institution :
Lab. de Microelectron., Univ. Catholique de Louvain, Louvain-Ia-Neuve, Belgium
Abstract :
A simple silicon-gate D-MOS process suitable for enhancement-depletion logic is described. Design and performance of D-MOS logic circuits are investigated and compared to standard E/D logic. Practical results of a low-power ring oscillator are presented.
Keywords :
MOS logic circuits; low-power electronics; oscillators; silicon; Si; enhancement-depletion logic; low power D-MOS logic; low-power ring oscillator; silicon-gate D-MOS process; standard E-D logic; Driver circuits; Inverters; Logic circuits; Logic design; Ring oscillators; Scattering parameters; Silicon; Transconductance; Transfer functions; Voltage;
Conference_Titel :
Solid State Circuits Conference, 1976. ESSCIRC 76. 2nd European
Conference_Location :
Toulouse
