Title :
Failure Analysis on a 65 K MOS RAM with a New Type of Memory Display
Author_Institution :
Siemens AG, Munich, Germany
Keywords :
Decoding; Displays; Failure analysis; Logic arrays; Random access memory; Read-write memory; System testing; TV; Timing; Topology;
Conference_Titel :
Solid State Circuits Conference - ESSCIRC 79, Fifth European
Conference_Location :
Southampton, UK
Print_ISBN :
0-85296-208-8
