DocumentCode :
517100
Title :
Concept of Probability Algorithm Conctruction for VLSI Optimal Design
Author :
Chernyshova, G. ; Chernykh, O.
Author_Institution :
Department of Applied Mathematics, Voronezh State University, Universitetskaya ploshad, 1, Voronezh, 394000, Russia. Tel: (0732)49 56 89 e-mail: fna@amm.vucnit.voronezh.su
fYear :
1995
fDate :
19-21 Sept. 1995
Firstpage :
410
Lastpage :
412
Abstract :
Frequently problems of VLSI optimal design are formulated as the optimizational models of Boolean programming, characterized by NP-completeness. We suggest a probability approach to algorithmization of such problems, using some aspects of quick "greedy" algorithms and extending their possibilities.
Keywords :
Algorithm design and analysis; Circuit synthesis; Greedy algorithms; Heuristic algorithms; Iterative algorithms; Logic programming; Logic testing; Mathematical model; Traveling salesman problems; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1995. ESSCIRC '95. Twenty-first European
Conference_Location :
Lille, France
Print_ISBN :
2-86332-180-3
Type :
conf
Filename :
5469199
Link To Document :
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