A 1.2-V 0.8-mW SI ΔΣ A/D Converter in Standard Digital CMOS Process

This paper presents the design and implementation of a 1.2-V switched-current delta-sigma A/D converter in a standard digital CMOS process. The key elements are the ultra-low voltage fully differential switched-current memory cell with common-mode feed forward and the ultra low voltage low power current quantizer. The converter dissipates a 0.78-mW power from a single 1.2-V supply voltage and the measured dynamic range is 10 bits.