DocumentCode :
517201
Title :
A -100 dB THD, 120 dB SNR programmable gain amplifier in a 3.3 V, 0.5 μm CMOS process
Author :
Compagne, Eric ; Martel, Gilbert ; Senn, Patrice
Author_Institution :
DOLPHIN INTEGRATION, BP65 - ZIRST, 38242 MEYLAN Cédex, FRANCE
fYear :
1995
fDate :
19-21 Sept. 1995
Firstpage :
38
Lastpage :
41
Abstract :
A fully differential amplifier that operates from a 3.3V±Â±10% power-supply and featuring a -100dB THD at 2Vpp output voltage was realized. Equivalent input noise in the 100Hz - 10kHz audio-band is IμVrms, leading to a 120dB SNR. This amplifier is used as the core of a programmable gain cell in the front-end part of a ΣΔ A/D converter. The good linearity performances are achieved thanks to a novel low impedance output stage which uses a simple but efficient schematic allowing rail to rail operation on a resistive and capacitive load. Such low distortion performances actually surpasses most available test equipment and the last section explains how to deal with that fact. The technological process is 0.5μm double poly CMOS from the << centre commun >> CNET-SGS-THOMSON at Crolles, France.
Keywords :
CMOS process; Differential amplifiers; Gain; Impedance; Linearity; Performance evaluation; Rail to rail operation; Signal to noise ratio; Test equipment; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1995. ESSCIRC '95. Twenty-first European
Conference_Location :
Lille, France
Print_ISBN :
2-86332-180-3
Type :
conf
Filename :
5469336
Link To Document :
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