Exploiting idle resources for reducing SER of microprocessor functional units

Soft errors in combinational logic are becoming a serious problem for VLSI design. This paper presents an idle resources based SER reduction scheme for functional units of microprocessors. By exploiting unoccupied hardware and slack time in functional units, this technique reduces overheads of fault tolerance greatly. We combine C-element based error correction techniques with idle resources exploiting to enhance fault tolerance capability of functional units. The experiment results show that 94.36% of injected SETs can be corrected by proposed soft error correction scheme in average, while overheads of fault tolerance are significant low because idle resources are exploited adequately.