Title :
Performance evaluation of cluster-based homogeneous multiprocessor system-on-chip using FPGA device
Author :
Luo-Feng, Geng ; Duo-Li, Zhang ; Ming-Lun, Gao
Author_Institution :
Inst. of VLSI Design, Hefei Univ. of Technol., Hefei, China
Abstract :
The cluster-based multiprocessor system-on-chip (MPSoC), which adopts the hybrid interconnection composed of both bus-based and NoC architecture, is a new infrastructure for MPSoC. For obtaining the fast exploration of multiple hardware (HW) and software (SW) implementation alternatives with accurate estimations of performance to tune the MPSoC architecture in an early stage of the design process, this paper use the FPGA device to prototype the cluster-based MPSoC with 17 processing cores. And, a suite of benchmarks, including several parallel applications with different characteristic of parallelism, workload and communication pattern, are designed and presented in this paper. The experiment results show that, the highest speedup ratio is up to 15.850.
Keywords :
field programmable gate arrays; multiprocessing systems; performance evaluation; system-on-chip; FPGA device; MPSoC architecture; NoC architecture; cluster-based homogeneous multiprocessor system-on-chip; performance evaluation; Application software; Computer architecture; Field programmable gate arrays; Hardware; Multiprocessing systems; Network-on-a-chip; Parallel processing; Process design; Prototypes; Software prototyping; Multiprocessor System-on-Chip; Network-on-Chip; Performance Evaluation;
Conference_Titel :
Computer Engineering and Technology (ICCET), 2010 2nd International Conference on
Conference_Location :
Chengdu
Print_ISBN :
978-1-4244-6347-3
DOI :
10.1109/ICCET.2010.5485671
