Title :
A high performance 3D interconnection network for many-core processors
Author :
Xue, Licheng ; Gao, Yujin ; Fu, Jibin
Author_Institution :
Sch. of Comput. Sci. & Technol., Beijing Inst. of Technol., Beijing, China
Abstract :
As technology scales, interconnection has played an important role in improving performance and reducing power consumption of CMP. While most of studies are mainly focus on two-dimension (2D) interconnection. With the increase of cores, the traditional 2D network techniques are no longer efficient for many-core processors. Three-dimension (3D) interconnection appears as a promising solution in high performance and power efficient interconnects design. In this paper, we propose a low-diameter 3D interconnection network for many-core processors. In our network, long range links are used to replace multiple short links. The path between any two nodes is no more than 5 hops. All the designs are evaluated by using a cycle-accurate 3D network simulator, and integrated with the Orion power model for performance and power analysis. The results show up to 33.00% latency reduction and 24.39% energy reduction on average compared with canonical 3D mesh network.
Keywords :
multiprocessing systems; multiprocessor interconnection networks; parallel architectures; 2D network techniques; Orion power model; canonical 3D mesh network; cycle-accurate 3D network simulator; high performance low-diameter 3D interconnection network; many core processors; power analysis; power consumption; power efficient three dimensional interconnection design; two-dimension interconnection; Analytical models; Bandwidth; Computational modeling; Computer science; Delay; Energy consumption; Multiprocessor interconnection networks; Silicon; Stacking; Wires; 3D stacking; interconnection; long range link; many-core;
Conference_Titel :
Computer Engineering and Technology (ICCET), 2010 2nd International Conference on
Conference_Location :
Chengdu
Print_ISBN :
978-1-4244-6347-3
DOI :
10.1109/ICCET.2010.5486092
