DocumentCode
522649
Title
Design of 60-GHz CPW-fed CMOS on-chip integrated antenna-filter
Author
Tsai, Kai-Hsiang ; Yeh, Lung-Kai ; Kuo, Pei-Chun ; Chuang, Huey-Ru
Author_Institution
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
fYear
2010
fDate
12-16 April 2010
Firstpage
1
Lastpage
3
Abstract
This paper presents a 60-GHz millimeter- wave on-chip integrated Yagi-antenna-filter fabricated with a 0.18-μm CMOS process. An FEM-based 3-D full-wave EM solver, HFSS, is used for design simulation. The measured input VSWR of the fabricated on-chip Yagi-antenna-filter is less than 2 from 55 to 65 GHz. The measured maximum power gain is about −14 dBi. The front-to-back ratio of the radiation pattern is about 14 dB.
Keywords
Antenna measurements; Antenna radiation patterns; Band pass filters; CMOS process; Coplanar waveguides; Horn antennas; Power measurement; Probes; Receiving antennas; Semiconductor device measurement; 60-GHz; CMOS; CPW; WPAN; Yagi; integrated antnna-filter; millimeter-wave; on-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Antennas and Propagation (EuCAP), 2010 Proceedings of the Fourth European Conference on
Conference_Location
Barcelona, Spain
Print_ISBN
978-1-4244-6431-9
Electronic_ISBN
978-84-7653-472-4
Type
conf
Filename
5505848
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